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Overview

ML620Q536

FeRAM

MR45V100A

Date : 2017/9/4

The MR45V100AMAZAATL is a nonvolatile 128K word x 8-bit ferroelectric random access memory (FeRAM) fabricated in silicon-gate CMOS technology. The MR45V100AMAZAATL is accessed using Serial Peripheral Interface(SPI).
As FeRAM cells are nonvolatile, backup batteries to hold data can be eliminated.
And, data can be read and written like SRAM, no erase or block operation is needed.
The device is guaranteed for the write/read tolerance of 1012 cycles per bit and the rewrite count can be extended significantly.

  • Specification
  • Documents
  • Tool/Software
Specification
Interface SPI
Density(bit) 1M
Supply Voltage(v) 1.8 to 3.6
Configuration(bank×word×bit) 128K×8
Operating Speed fclk=40MHz
Read/Write Endurance 1013
Data Retention 10
Operating Temperature(°C) −40 ~ +85
Package SOP8-200-1.27
Implementation specifications
Package code Contents Download
P-SOP8-200-1.27-T2K Outline and Dimension, Recommended Reflow Conditions, Shipment Package Specification, Mounting area for package lead soldering to PC boards, Marking Layout
pdf
Environmental data
Package code Contents Download
P-SOP8-200-1.27-T2K RoHS Certificate of Compliance, Reach Certificate of Compliance, List of ingredient substances, SOC Analysis Report
pdf
No Entry
Contents Version Date Download
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